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SOLA2060 performance of a system
创建日期：2024-08-27 14:48:48
标签： SOLA2060
performance of a system

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SOLA2060 Final Exam 2024


You will design, simulate and analyse the performance of a system that will allow powering a resistive load with an AC voltage using a solar panel and a battery. Your goal is to make the system as efficient  as possible. Assume operation is at STC.

The solar panel you have is composed of 48 solar cells in series, each with a 660mV open circuit voltage and a short circuit current of 2.35 Amps under standard test conditions (STC). The panel is known to have a series resistance of 100 mΩ and a shunt of 300 Ω .

The battery you have available has a 200 Ah capacity. For your simulation, assume that it has a voltage of 40V and series resistance of 30 mΩ . It should be charged by the solar panel. This should be done using a fractional VOC MPPT.

The system will use any number of DC-DC and DC-AC converters necessary to power a 32 Ohm load at a 40V±2% RMS voltage at 60 Hz with a THD of no more than 1%. You should use a full bridge inverter  using a switch with an on resistance of 50 mΩ . Make sure you design the correct L-C filter to get the desired performance. In the DC-DC converters, you can use any MOSFET you want provided it can handle the current and voltage levels your system will experience. The only Schottky diode you will be  allowed to use anywhere in the circuit (including the inverter) will need to be modelled based on the I- V properties you will simulate in PC1D. You should use the same diode model for all the Schottky diodes in your design.

The Schottky diodes you can use are produced by a company that fabricates bespoke electronic devices. The diodes are 20 mm2  devices built on 250um thick 35 mΩ p-type wafers with a 10 μs lifetime. They offer a technology that can produce Schottky barriers on p-type silicon with a 0.45 eV barrier on 2x1015 cm-3  silicon layers with a 10 μs lifetime. This low doped layer is grown on top of the  wafer and can be as thick as 10 μm. The thickness of the layer is defined by the design engineer (aka, you) to achieve a desired breakdown voltage. Breakdown occurs when the electric field in the depletion region reaches 300 kV/cm. Ensure that the breakdown voltage you design is 20V higher than the highest reverse bias voltage the diode will experience in any of the circuits you will design. Note: When simulating the reverse bias I-V you will probably need to reduce the thickness of the substrate to 2 μm to ensure convergence in your simulation. Don’t forget to make the surface recombination at the Schottky metal interface very large (1010  cm/s for example).

The DC-DC converters you will design operate with a frequency no lower than 50 kHz. They all use inductors with an inductance as high as 470 μH and as slow as 50 μH and a series resistance of 2 mΩ/100 μH. So, for example, a 250 μH inductor would have a series resistance of 5 mΩ . It is recommended that the DC-DC converter used to charge the battery uses 50 μF capacitors in the input   and the output. If you need to use a DC-DC converter to generate a DC input voltage for the inverter, it is recommended that you use a large 10 mF capacitor at the output of this DC-DC converter. In your final circuit, make sure to use inductors that will ensure you have CCM conditions under steady state operating conditions.

To get you started, design first the overall circuit you will require using RB168VAM150 diodes and Si7802DN MOSFETs. Use the model of the panel you have assigned as well as the battery. Use the resistive AC load you have assigned at the output of the inverter with an LC filter using a 50mH inductor and a 50 μF capacitor. For the inverter, use an mf of 10 and the AC frequency you have been assigned. For the DC-DC converters use a duty cycle of 50 %. Please note these will most likely not be  the correct devices and settings for your final circuit.

Layout the whole circuit in LTspice and run a simulation so that you ensure that LTspice will accept your circuit. Once you have a simulation going, then enter the details you need to make an efficient system with your specific requirements. If you find it easier, optimise each part of your system in a separate file.

How to prepare to the exam:

    Start with a slide that states your requirements as well as the achieved performance after 10 cycles of the AC signal. Make sure you highlight the overall efficiency of the system.

    In another slide show the overall layout of your circuit usingblock diagramsto make it easy to  understand. Use different blocks for solar panels, batteries, buck converters, boost converters, inverters and loads. For each block, list its most important characteristics. For any converter, identify its conversion efficiency. Use this slide to explain how you decided on this overall design.

    You should also have slides that discuss:

o How you went about designing the Schottky diode and how you made sure you can model it in LTspice for use in your circuit.

o How you characterised your solar panel and how you ensured it would operate at MPP.

o How you ensured that the output of the inverter remained constant.

o Considerations used to design each part of the system, what were the challenges in designing each part and how you optimised it.

o Finally, show the performance of your circuit using a real time LTspice simulation over

3 cycles of the AC output voltage. Be ready to answer questions on the spot that will require you to measure voltages, currents and power as well as explaining how each part of the system works.

Helpful hints:

If you are stuck with in any part of the problem don’t spend too long there. Focus on what you can solve or optimise first. The circuit should work from the get-go using the MOSFETs, diodes and capacitors recommended to start the simulation. You can use the any inductor within the range  allowed if you don’t know where to start. This should allow you to solve the problem even if not optimally. If you are stuck with the fractional MPP circuit, leave that till the end and use instead a duty cycle that ensure your panel is in MPP. Manage your time: Simplify your solution when you are stuck and come back to that part once you have put together a solution and slides. It is better to have something to show at the time of the exam rather than no slides because you spent too long solving the problem.

To speed up your simulations, used 50 kHz for the DC-DC converters. If you decide to increase the frequency, do this as the last step as it may slow down your simulation.

When simulating your circuit, you should be able to optimise it using probably about 3 cycles of the AC signal provided your circuit reaches steady state then.

To ensure you reach steady state as soon as possible in your LTspice simulations, it is recommended that you add the initial condition spice directive (.ic). Using this spice directive, ensure the initial current in the inductor of any DC-DC converter you use is set to 0 Amps. Ensure also that the output voltage of your DC-DC converter circuit is set to the expected steady state condition. For example, for a buck converter that uses an inductor with the identifier L33 and that is expected to have an output voltage of 34 Volts in steady state, you would use the spice directive .ic I(L33)=0 V(OUT)=34.

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