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PL241 Advanced Compiler Construction

创建日期：2024-08-02 15:07:06

所属分类：计算机computer science

标签： PL241

Advanced Compiler Construction

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Advanced Compiler Construction

Course Project

The project assignment for this course will illustrate various aspects of optimizing compilers by

way of a scaled-down example. You will be asked to construct an optimizing compiler for the

simple programming language. The syntax of PL241 is given below; the semantics of the

various syntactical constructs are hopefully more or less obvious. PL241 has integers, arrays,

functions (which return a scalar result) and procedures (which don’t return anything). There are

three predefined procedures InputNum, OutputNum, and OutputNewLine. All arguments to

functions and procedures are scalar (arrays cannot be passed as parameters).

First Step

You will build a simple recursive-descent parser that generates an intermediate representation

appropriate for subsequent optimizations. The intermediate representation will be a dynamic

data structure in memory and needs to provide control flow and dominator information for basic

blocks. Further, data dependence information (“def-use-chains”) is required for all constants,

variables and intermediate results. Instructions should be represented in Static Single

Assignment form.

The operations encoded in instruction nodes consist of an operator and up to two operands.

The following operators are available (the use of operator adda will be explained in the lecture):

neg x unary minus

add x y addition

sub x y subtraction

mul x y multiplication

div x y division

cmp x y comparison

adda x y add two addresses x und y (used only with arrays)

load y load from memory address y

store y x store y to memory address x

move y x assign x := y

phi x x1 x2 ... x := Phi(x1, x2, x3, ...)

end end of program

bra y branch to y

bne x y branch to y on x not equal

beq x y branch to y on x equal

ble x y branch to y on x less or equal

blt x y branch to y on x less

bge x y branch to y on x greater or equal

bgt x y branch to y on x greater

read read

write x write

writeNL writeNewLine

The intermediate representation generated by your compiler should be visualized using the VCG

(Visualization of Compiler Graphs) package that is available on the Internet (just type “vcg” into

the Google search engine). VCG is a priceless tool for debugging the kind of complex dynamic

data structures that are used in optimizing compilers. Your output should consist of the CFG

visually depicted by basic blocks (boxes) connected by control flow (lines), and within each

basic block, the instruction list should be shown in a format similar to what we are using in

class. Additionally, you should visualize the dominator tree.

Second Step

After you are confident that your conversion to SSA works correctly, extend your compiler by

implementing common subexpression elimination and copy propagation on the control flow

graph. In order to make this process visible to the user, introduce a trace mode that produces an

elimination protocol. Display the resulting program after elimination in SSA form (without any

MOVE instructions remaining), again using the VCG package. Perform experiments to test your

implementation for correctness.

Third Step

Implement a global register allocator for your compiler. For this purpose, track the live ranges

of all the individual values generated by the program being compiled, and build an interference

graph. Color the resulting graph, assuming that the target machine has 8 general-purpose data

registers. If more registers are required, map the values that cannot be accommodated onto

virtual registers in memory. Eliminate all Phi-Instructions, inserting move-instructions wherever

necessary. Display the final result using VCG, and perform experiments to test your

implementation.

Fourth Step

Write a code generator for the source language that emits optimized (CSE, copy propagation,

choose your target platform from x86/Windows, x86/Linux, or you may use the DLX processor

simulator.

Optional Final Step

Perform instruction scheduling between the register allocation and code generation stages of

your compiler. Try to find a scheduling heuristic that improves performance over non-scheduled

code.

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FE 825 IERG 5130 STAT 8178 EE161 ADS2 G54FUZ CS326 113B ECN 226 QBUS6860 ELEC3202 COMP9334 MGT11B MET CS 777 STA238 00099F Python SMM306 CMT206 EC116 SP MAST90084 CS480/680 BCPM0091 CMPT 300 ECON2209 FY20 STAT 432 CVEN9625 MATH1712 CMP9771M CMP3750M CIS 325 AI506 MAT344H1S MGT7180 PSTAT 160B CSYS5010 1D STAT 453/558 ME152B STA304H1F CSCI-128 ME428 CO3002 FINE 7640 COMP3234 ECSE 223 EE497 – 3D MATH5905 ECS648U ENG5009 MATH10242 EC665 A CPI221 ISOM5220 MACE40402 MGT B456F COMP9315 AFM 113 STAT 778 CS 564 MA231 CS 230 CS 124 COMP5511 CSC317 ITEC1010 ELEC207 INFT 3019 7CCMFM06 EE 161 5G ECLT5810 MATH 7349 CS526 O2 COMP90054 ELE00063M ACCT5034 ARC1015 CSCI 40 CSCI E40 FIN 524B CS 462 389COM CMT309 MFIN703 COMP4250 STA304 STA304H1S STA 1003 FIN 448 BUFN 732 CS520 CVEN3701 ECMT6006 PHAS0100 CSIT314 MDIA 5028 CSCI 2134 MAT 451 CMPT 459 STAT 457 INFO20003 COMP4141 IELE8066 F540 ECM9 CSE 6321 FIN 430 MATH3911 BFC5916 COMP1011 EEE 6209 STATS 240 CW3 COMP206 COMP1003 4331W ISE 530 CMPT 295 MATH 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1300A ENGG 1300 OLET1139 STAT 3503 STAT 206 FEM11149 ELEN 4720 COMP20003 SOLA1070 CS574 C11CS LINB29H3 MAST90083 ECON7200 STAT 610 LINB29 DSM-5 COMP3161 EEEN40010 MATH 4431 K353 STA 3386 IERG4300 COMS W4167 ENG5298 AMME 2302 CS3910 COMPSCI 320 STATS 369 GR5242 COSC 328 CSCI435 MGTS1301 INFS2200 COMP3900 CIS 375 Module AE03 COMP3121 CS260 HAM503 MGMT5050 INT3075 COSC 285 GEOL0029 GEGE2X01 STAT1201 MATH1061 MMF1941H STAT 5060 CS 520 COMP 4320 MSIN0104 000T FINS3648 ECMT2160 ECON4003 Phys 129L CSE 142 CS 3130 MGEB01 EECS 340 Finance (20443/20444) ECMM149 COMP5310 EEEN60180 CSC 111 AT2 CSCI 4430 STAB57 MA/CSC 427 MATH322 D100 CSCI544 CITS3004 CI6227 CSE 565 APCO 1P01 852L1 ELEC S411F COMP3207 STATS330 ECON7530 FIT5149 CSI4104 CMPT 371 COMP201 SEHS4696 FI4003 MATH6182 CG1 WS MATH401 MGT 205 QTM 110 COMP 0137 MACE12201 FIT5210 ECE 544 BISM7206 HUDM 6055 ECON3203 STATS 210 MSCI 570 MATH6173 COMPSCI4039 Accounting COM3503 AOE2024 ECON213 PSYC10004 Control Data 100/200A PHIL2617 PHYS3116 MIE250 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