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ELEC2133 Analogue Electronics This midterm contributes to 10% of the total assessment of this course The due date is on Monday July 18, 2022 (11:59pm). Your submissions are to be submitted on Moodle before the due date and time. Assignments submitted after this date will attract a penalty of 5% per day. The take home midterm contains two problems with four parts. The first problem is the continuation of assignment II. The parts which deal with frequency response and simulation are included here. The second problem is the modified version of assignment I. Each problem contains one or more parts. Each part has been labelled with P, C, D or HD that indicates the level of difficulty. P means that the question could be attempted by all students and students who answer the question correctly are at the level of “pass”. C means the question could be attempted by students who are at the level of “credit” in the course. D and HD indicate the question could be attempted by students who are at the level of “Distinction” and “High Distinction”, respectively. What does this mean? If you are targeting to pass or get credit in the course, you may only attempt those P or C types of questions. If you are happy or targeting to get a distinction, you can attempt those P, C, and D types of questions. If you are targeting a to get high distinction, you should attempt all the questions including HD type of questions. 2 QUESTION 1 [60 Marks] In the assignment I, you analyzed and designed the charge readout circuit for PZT actuator shown in Fig 1(a). One of the problems that is encountered in the readout circuit is that the last stage of the amplifier, which is the non-inverting amplifier, amplifies low-frequency noise from power supply or the vibration of the actuator due to environmental factors. It also amplifies any of DC imperfections contributed from the previous stages. Reducing the noise at the output is important while ensuring the readout signal is amplified. Although there are other modifications that may be applied to the non-inverting amplifier in order to achieve high signal- to-noise ratio, the non-inverting amplifier will be replaced by a three-stage transistor amplifier shown in Fig. 2(a) in this assessment. Your task will be to calculate its bandwidth. Fig. 1: PZT actuator self-sensing readout circuit The three-stage amplifier consists of one n-channel MOSFET transistor M1 in depletion mode with W/L = 1 and two BJT transistors Q1 and Q2. The transistors have the model parameters as provided in the Table below Transistor Parameters M1 Kn = 10mA/V 2 VTN = -2V λ=0.02V-1 Cgs = 3.5pf, Cgd = 0.1pf Q2 β=150 VA = 80V VBE = 0.7V fT = 2GHz, Cµ= 0.2pf Q3 β=80 VA = 60V VBE = 0.7V fT = 2GHz, Cµ= 0.2pf C2 VPZT CPZT Vin R1 R2 C1 R5 R3 R4 +V -V +V -V -V +V Vo PZT Actuator 3 RD2 0.62K +15V M1 Vs RS1 0.2K RG 1M Rs 10K 10µF 10µFC2 10µF C4 R1 78K R2 22K RC2 4.7K RE2 1.6K C3 10µFC6 R4 120K RE3 3.3K C5 Q2 Q3 R3 91K RL 0.25K C1 Vo 10µF10µF Fig. 2: A three-stage transistor amplifier PART I (Calculating bandwidth) a) [P,C] Draw small-signal equivalent circuit of the amplifier in the form suitable for low frequency. [5 marks] b) [P,C] Calculate the lower 3dB frequency, fL, of the amplifier using the appropriate time constant method. [15 Marks] c) [P,C] Draw small-signal equivalent circuit of the amplifier in the form suitable for high-frequency analysis. [5 Marks] d) [DN]*Calculate the higher 3dB frequency, fH, of the amplifier using the appropriate time constant method. [15 Marks] PART II (LTSpice or Pspice Simulation) a) [DN] *Simulate Fig. 2 and compare the results with your calculation in assignment II and Part I. The Spice transistor models will be uploaded on Moodle. [20 marks] 4 QUESTION 2 [40 Marks] The Opamp readout circuit you dealt with in assignment I and shown in Fig. 1 is modified to fig. 3. Vin C2 VPZT CPZT R1 R2 R5 R3 +V -V +V -V -V +V Vo PZT Actuator R4 R4 R3 Fig. 3: Modified readout circuit PART I (Opamp circuit) a) [P,C] Assuming R1=R2, CPZT =C2, and 5 ≫ | 1 2 |, find the expression of the output voltage, Vo. [15 marks] b) [P,C] In the non-ideal case, all op-amps in Fig. 3 have the following DC imperfections Input bias current: IB = 40nA at room temperature Input offset current: Iio = ±2nA at room temperature Input offset voltage: Vio = ±2mV at room temperature Calculate the worst-case output offset voltage at room temperature assuming R5 = 0.5M, R4 = 280K, R3 = 1K, R1=1K, R2=1K, C1 = C2 = CPZT = 10nf. [25 marks]