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M3H623544 Digital and Programmable Systems
创建日期：2024-04-17 17:19:27
所属分类：数学mathematics
标签： M3H623544
Digital and Programmable Systems

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M3H623544 Digital and Programmable Systems 2 

M Mata page 1 Tutorial 2 – MSP430 Architecture - SOLUTIONS 1. Use a diagram to help you describing 

VonNeumann and Hardvare architecture. Explain why the VonNeumann bottleneck happens. 

2. A certain 32-bit computer uses 16bit in its MAB. How many memory addresses may it handle?

 What’s the maximum amount of memory (in MB) it can support? With 16 address bits it can handle 216=65536 memory addresses (64K). 

As the computer is 32-bit it means that the memory width is 32-bit (4-Byte), so the total 

amount of memory is 64K x 4Bytes = 256KB 3. What does “single, contiguous memory space” means? 

It means that all CPU registers, peripheral devices configuration and data registers, and memories (RAM, flash) 

even if physically separated, are connected in a way that they can be accessed using a single MAB (it is shared), 

covering all addresses from 0 to 2MABbits-1. In the MSP430, CPu registers are in the lowest memory addresses, 

then peripheral registers, then code memory, then RAM data memory, some more code memory, 

and finally the interrupt vector table in the higher memory addresses. Digital and Programmable Systems 2 M Mata page 2 4.

 What are the differences between General Purpose Registers and RAM positions? 

Registers are placed inside the CPU itself with direct connection to the ALU so using them is the fastest option: from 2 to 10 times faster in a MCU, up to 100 times faster in a computer using DRAM instead of SRAM technology for the RAM memory. Machine instructions work directly on CPU registers, but not all of them can access the RAM. The number of registers is very limited (only a few variables), while the RAM is relatively large. 5. Briefly describe the 4 special function registers in the MSP430 (R0=PC, R1=SP, R2=SR/CG1, R3=CG2) - R0 is the Program Counter. It holds the address of the next instruction to be executed. Overwriting it creates a jump in the execution sequence. - R1 is the Stack Pointer. It always points to the top of the Stack. The Stack is a RAM region ued in a special way by some instructions to: a)temporally save values, b)passing parameters to/from subroutines, c)handle the return address from subroutines, d)handling the return address from Interrupt Service Routines - R2 has two functions: a) holding the System flags and b)as Constant Generator 1 (CG1) - R3 is Constant Generator 2 (CG2). 

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